Makefile: remove the options target
The Makefile used to suppress output (by using @), so this target made sense at the time. But the Makefile should be simple and make debugging with less abstractions or fancy printing. The Makefile was made verbose and doesn't hide the build output, so remove this target. Prompted by a question on the mailing list about the options target.
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10
Makefile
10
Makefile
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@ -7,13 +7,7 @@ include config.mk
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SRC = st.c x.c
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SRC = st.c x.c
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OBJ = $(SRC:.c=.o)
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OBJ = $(SRC:.c=.o)
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all: options st
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all: st
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options:
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@echo st build options:
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@echo "CFLAGS = $(STCFLAGS)"
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@echo "LDFLAGS = $(STLDFLAGS)"
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@echo "CC = $(CC)"
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config.h:
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config.h:
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cp config.def.h config.h
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cp config.def.h config.h
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@ -54,4 +48,4 @@ uninstall:
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rm -f $(DESTDIR)$(PREFIX)/bin/st
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rm -f $(DESTDIR)$(PREFIX)/bin/st
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rm -f $(DESTDIR)$(MANPREFIX)/man1/st.1
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rm -f $(DESTDIR)$(MANPREFIX)/man1/st.1
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.PHONY: all options clean dist install uninstall
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.PHONY: all clean dist install uninstall
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